at an adjustable-power gain stage of a comparator system, receiving a differential input signal;

in response to the differential input signal, selectively processing the differential input signal to maintain a constant gain in a higher speed comparator mode and in a lower power comparator mode, and providing a gain stage output signal;

receiving the gain stage output signal at an output stage of the comparator system; and

in the higher speed comparator mode, opening a buffer input switch and closing a buffer output switch to provide a switched output signal at an output node of the comparator system, and

in the lower power comparator mode, closing the buffer input switch and opening the buffer output switch to provide a switching voltage at an input of a buffer circuit, and providing the switched output signal at the output node using the buffer circuit in response to the switching voltage.