CPC H03K 3/037 (2013.01) [G06F 30/392 (2020.01); H03K 19/018521 (2013.01)] | 20 Claims |
1. An integrated circuit comprising:
a first region comprising:
a first set of transistors comprising:
a first set of active regions having a first threshold voltage, the first set of transistors in an input circuit, the input circuit being coupled to a first voltage supply, and configured to receive a first input signal, and to generate at least a second input signal or a third input signal;
a second region adjacent to the first region, the second region comprising:
a second set of transistors comprising:
a second set of active regions having a second threshold voltage, the second set of transistors in a first portion of a level shifter circuit a header circuit and an enable circuit, the first portion of the level shifter circuit being coupled to at least the input circuit and a second voltage supply different from the first voltage supply; and
a third region adjacent to the first region, the third region comprising:
a third set of transistors comprising:
a third set of active regions having a third threshold voltage different from the first threshold voltage and the second threshold voltage, and the third set of transistors in a second portion of the level shifter circuit.
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