US 12,191,763 B2
Semiconductor device
Sanggyeong Won, Suwon-si (KR); and Hyunjin Shin, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Jan. 14, 2023, as Appl. No. 18/097,226.
Claims priority of application No. 10-2022-0067587 (KR), filed on Jun. 2, 2022.
Prior Publication US 2023/0396160 A1, Dec. 7, 2023
Int. Cl. G11C 5/14 (2006.01); G11C 16/08 (2006.01); G11C 16/14 (2006.01); H02M 3/07 (2006.01); G11C 16/30 (2006.01)
CPC H02M 3/07 (2013.01) [G11C 5/147 (2013.01); G11C 16/08 (2013.01); G11C 16/14 (2013.01); G11C 16/30 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a plurality of memory cells; and
a peripheral circuit configured to control the plurality of memory cells,
wherein the peripheral circuit includes:
a temperature compensation circuit configured to output a compensation current determined based on a temperature of the semiconductor device,
a voltage regulator configured to regulate a pump voltage having a level determined based on the compensation current,
a clock generator configured to generate a clock signal having a frequency determined based on the compensation current, and
a charge pump circuit including:
a level shifter configured to output a control signal adjusted a swing level of the control signal based on the clock signal and the pump voltage, and
a plurality of unit circuits each including a plurality of pumping capacitors configured to be charged and discharged by the control signal.