US 12,191,754 B2
Method and device for suppressing narrow pulse, and bridge switching circuit
Qing Wei, Tianjin (CN); Shenping Hong, Tianjin (CN); Honglei Sha, Tianjin (CN); Tianye Yu, Tianjin (CN); Aiguo Peng, Tianjin (CN); Xiaohua Zhang, Tianjin (CN); Shaofeng Kang, Tianjin (CN); and Lingsi Xia, Tianjin (CN)
Assigned to TIANJIN EMAGING TECHNOLOGY CO., LTD., Tianjin (CN)
Appl. No. 17/922,966
Filed by TIANJIN EMAGING TECHNOLOGY CO., LTD., Tianjin (CN)
PCT Filed Dec. 31, 2021, PCT No. PCT/CN2021/144058
§ 371(c)(1), (2) Date Nov. 2, 2022,
PCT Pub. No. WO2022/247289, PCT Pub. Date Dec. 1, 2022.
Claims priority of application No. 202110594686.1 (CN), filed on May 28, 2021.
Prior Publication US 2024/0223068 A1, Jul. 4, 2024
Int. Cl. H02M 1/00 (2007.01); H02M 1/38 (2007.01); H02M 7/5387 (2007.01); H02M 1/088 (2006.01)
CPC H02M 1/0038 (2021.05) [H02M 1/38 (2013.01); H02M 7/53873 (2013.01); H02M 1/088 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A method for suppressing a narrow pulse, applied to a bridge switching circuit comprising at least one bridge arm, each of the bridge arm comprising an upper switch transistor and a lower switch transistor connected in series; the bridge switching circuit uses a comparison result of a count value of a triangular carrier and a comparison value of a modulated wave to generate a driving pulse of the upper switch transistor or the lower switch transistor; the method for suppressing the narrow pulse comprises:
detecting whether an original comparison value of the modulated wave in a current cycle is within a preset narrow pulse interval of the upper switch transistor, wherein the preset narrow pulse interval of the upper switch transistor comprises a plurality of adjustment intervals of the upper switch transistor obtained by dividing a corresponding value range of the original comparison value of the modulated wave in the current cycle;
determining an adjustment interval of the upper switch transistor to which the original comparison value of the modulated wave currently pertains when it is detected that the original comparison value of the modulated wave in the current cycle is within the preset narrow pulse interval of the upper switch transistor; and
adjusting the original comparison value of the modulated wave to an adjusted comparison value of the modulated wave corresponding to the adjustment interval of the upper switch transistor to which the original comparison value of the modulated wave currently pertains according to a corresponding relationship between the adjustment intervals of the upper switch transistor and adjusted comparison values of the modulated wave.