| CPC H01L 29/7848 (2013.01) [H01L 29/1033 (2013.01)] | 20 Claims |
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1. A semiconductor device, comprising:
a substrate that includes a first region, a second region, and a third region;
a plurality of first semiconductor patterns that are vertically stacked on the first region;
a second semiconductor pattern on the second region;
a plurality of third semiconductor patterns and a plurality of fourth semiconductor patterns that are vertically and alternately stacked on the third region;
a first electrode on the plurality of first semiconductor patterns, a second electrode on the second semiconductor pattern, and a third electrode on the plurality of third semiconductor patterns; and
a first source/drain pattern on opposite sides of the plurality of first semiconductor patterns,
wherein:
the plurality of first semiconductor patterns, the second semiconductor pattern, and the plurality of fourth semiconductor patterns each include a first semiconductor material, and
the plurality of third semiconductor patterns include a second semiconductor material different from the first semiconductor material.
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