| CPC H01L 29/78391 (2014.09) [H01L 29/40111 (2019.08); H01L 29/6656 (2013.01)] | 20 Claims |
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1. A semiconductor device, comprising:
a field-effect transistor, comprising:
a gate structure disposed on a semiconductor channel of a semiconductor substrate;
a source region and a drain region disposed in the semiconductor substrate at opposite ends of the semiconductor channel;
an interlayer dielectric layer disposed on the semiconductor substrate and surrounding the gate structure; and
a source contact and a drain contact extending through the interlayer dielectric layer to contact the source region and the drain region, wherein top surfaces of the source contact and the drain contact are flushed with a top surface of the gate structure;
a thin film transistor, disposed over and electrically to the field-effect transistor, and comprising:
a semiconductor oxide channel pattern;
a gate pattern disposed over the semiconductor oxide channel pattern;
two metal contacts disposed over the semiconductor oxide channel pattern and beside the gate pattern; and
a high-k dielectric pattern disposed between the gate pattern and the semiconductor oxide channel pattern and in contact with the two metal contacts, wherein the high-k dielectric pattern is disposed only between facing inner sidewalls of the metal contacts, a width of the high-k dielectric pattern is less than a width of the semiconductor oxide channel pattern, and sidewalls of the semiconductor oxide channel pattern are respectively flushed with outer sidewalls of the metal contacts; and
a ferroelectric tunnel junction disposed over and electrically connected to one of the metal contacts of the thin film transistor, wherein the ferroelectric tunnel junction comprises:
a first electrode;
a second electrode, disposed over the first electrode; and
a layered structure comprising at least two crystalline oxide layers and at least two ferroelectric layers disposed alternately and in direct contact with each other between the first electrode and the second electrode, wherein each of the first electrode and the second electrode is TiN, TaN, or a combination thereof, and a bottommost crystalline oxide layer of the layered structure is in direct contact with the first electrode, and wherein a topmost ferroelectric layer of the layered structure is in direct contact with the second electrode.
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