US 12,191,387 B2
High voltage semiconductor device and manufacturing method thereof
Hanseob Cha, Cheongju-si (KR)
Assigned to SK keyfoundry Inc., Cheongju-si (KR)
Filed by SK keyfoundry Inc., Cheongju-si (KR)
Filed on Oct. 29, 2021, as Appl. No. 17/513,948.
Claims priority of application No. 10-2021-0044276 (KR), filed on Apr. 5, 2021.
Prior Publication US 2022/0320333 A1, Oct. 6, 2022
Int. Cl. H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01)
CPC H01L 29/7823 (2013.01) [H01L 29/063 (2013.01); H01L 29/0847 (2013.01)] 19 Claims
OG exemplary drawing
 
17. A semiconductor device, comprising:
a substrate;
a first layer doped with a high concentration N-type impurity and disposed on the substrate;
a second layer doped with a high concentration P-type impurity and disposed on the first layer;
a third layer doped with the high concentration P-type impurity and disposed on the first layer;
a conductive type body region disposed on a side of the second layer, wherein each of the second layer and the third layer is in direct contact with the conductive type body region;
a conductive type drift region disposed on the second layer;
a conductive type deep well region disposed on the first layer;
a shallow trench isolation region disposed on the conductive type deep well region;
a gate electrode arranged to overlap the conductive type body region, the conductive type drift region, and the shallow trench isolation region;
a drain region disposed adjacent to the shallow trench region;
a source region disposed between two adjacent gate electrodes; and
a deep trench isolation region disposed adjacent to the drain region,
wherein the source region is spaced apart from the deep trench isolation region.