US 12,191,381 B2
Semiconductor device
Masanori Miyata, Kariya (JP); Yuuma Kagata, Kariya (JP); Yuki Yakushigawa, Seto (JP); Masaru Senoo, Okazaki (JP); Hiroshi Hosokawa, Nagoya (JP); and Takaya Nagai, Toyota (JP)
Assigned to DENSO CORPORATION, Kariya (JP)
Filed by DENSO CORPORATION, Kariya (JP)
Filed on Feb. 28, 2022, as Appl. No. 17/682,395.
Application 17/682,395 is a continuation of application No. PCT/JP2020/033285, filed on Sep. 2, 2020.
Claims priority of application No. 2019-161392 (JP), filed on Sep. 4, 2019.
Prior Publication US 2022/0181471 A1, Jun. 9, 2022
Int. Cl. H01L 29/739 (2006.01); H01L 29/10 (2006.01); H01L 29/861 (2006.01)
CPC H01L 29/7393 (2013.01) [H01L 29/1095 (2013.01); H01L 29/861 (2013.01)] 5 Claims
OG exemplary drawing
 
1. A semiconductor device having an insulated gate bipolar transistor (IGBT) region in which an IGBT element is formed and a free wheel diode (FWD) region in which an FWD element is formed, the semiconductor device comprising:
a semiconductor substrate including:
a drift layer of a first conductivity type;
a base layer of a second conductivity type disposed in a surface layer portion of the drift layer;
an emitter region of the first conductivity type disposed in a surface layer portion of the base layer in the IGBT region to be apart from the drift layer, the emitter region having a higher impurity concentration than the drift layer;
a collector layer of the second conductivity type disposed on a side of the drift layer opposite from the base layer in the IGBT region; and
a cathode layer of the first conductivity type disposed on the side of the drift layer opposite from the base layer in the FWD region;
a gate insulating film disposed on a surface of the base layer located between the emitter region and the drift layer;
a gate electrode disposed on the gate insulating film;
a first electrode electrically connected to the base layer and the emitter region; and
a second electrode electrically connected to the collector layer and the cathode layer, wherein
the IGBT region and the FWD region are arranged in one direction as an arrangement direction,
the IGBT region has a first region disposed adjacent to the FWD region in the arrangement direction, and a second region different from the first region and disposed on a side of the first region opposite from the FWD region in the arrangement direction,
each of the first region and the second region includes the drift layer, the base layer, the emitter region, the collector layer, the gate insulating film, the gate electrode, the first electrode, and the second electrode, and
each of the FWD region and the first region of the IGBT region has a carrier extraction portion that facilitates extraction of carriers injected from the second electrode compared to the second region when a forward bias for causing the FWD element to operate as a diode is applied between the first electrode and the second electrode.