US 12,191,380 B2
Semiconductor device and method
Ssu-Yu Liao, Hsinchu (TW); Tsu-Hui Su, Taipei (TW); Chun-Hsiang Fan, Hsinchu (TW); Yu-Wen Wang, New Taipei (TW); Ming-Hsi Yeh, Hsinchu (TW); and Kuo-Bin Huang, Jhubei (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jul. 21, 2022, as Appl. No. 17/814,185.
Application 17/814,185 is a division of application No. 16/899,119, filed on Jun. 11, 2020, granted, now 11,424,347.
Prior Publication US 2022/0359734 A1, Nov. 10, 2022
Int. Cl. H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 29/161 (2006.01); H01L 29/423 (2006.01); H01L 29/78 (2006.01); H01L 29/786 (2006.01)
CPC H01L 29/66818 (2013.01) [H01L 21/02532 (2013.01); H01L 21/02603 (2013.01); H01L 21/823807 (2013.01); H01L 21/823814 (2013.01); H01L 21/823821 (2013.01); H01L 21/823828 (2013.01); H01L 21/823871 (2013.01); H01L 27/092 (2013.01); H01L 27/0924 (2013.01); H01L 29/0673 (2013.01); H01L 29/0847 (2013.01); H01L 29/1037 (2013.01); H01L 29/161 (2013.01); H01L 29/42392 (2013.01); H01L 29/66545 (2013.01); H01L 29/66742 (2013.01); H01L 29/7848 (2013.01); H01L 29/78618 (2013.01); H01L 29/78684 (2013.01); H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
forming a semiconductor fin over a semiconductor substrate, the semiconductor fin comprising a silicon germanium portion and a silicon portion, wherein a germanium concentration of a lower portion of the silicon germanium portion of the semiconductor fin is greater than a germanium concentration of an upper portion of the silicon germanium portion of the semiconductor fin; and
trimming the semiconductor fin, wherein the lower portion of the silicon germanium portion of the semiconductor fin is trimmed at a greater rate than the upper portion of the silicon germanium portion of the semiconductor fin, wherein trimming the semiconductor fin exposes a first horizontal surface of the silicon portion of the semiconductor fin.