US 12,191,362 B2
Stacked semiconductor devices in sealants and interconnected with pillar electrodes
Takashi Suzuki, Takamatsu (JP)
Assigned to AOI Electronics Co., Ltd, Takamatsu (JP)
Filed by AOI Electronics Co., Ltd., Takamatsu (JP)
Filed on Mar. 9, 2022, as Appl. No. 17/690,788.
Claims priority of application No. 2021-39205 (JP), filed on Mar. 11, 2021.
Prior Publication US 2022/0293748 A1, Sep. 15, 2022
Int. Cl. H01L 29/41 (2006.01); H01L 29/40 (2006.01); H01L 29/49 (2006.01)
CPC H01L 29/41 (2013.01) [H01L 29/401 (2013.01); H01L 29/49 (2013.01)] 6 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a first semiconductor element having a first surface provided with a first pillar electrode; and a second semiconductor element having a second surface provided with a plurality of second pillar electrodes, the semiconductor device further comprising:
a connecting layer electrically connecting a second pillar electrode formed in a first portion of the second surface to the first pillar electrode, the first portion facing the first surface;
a third pillar electrode electrically connecting a second pillar electrode formed in a second portion of the second surface to an outside of the semiconductor device, the second portion being different from the first portion;
a first sealant sealing the first pillar electrode and the third pillar electrode; and
a second sealant in contact with the first sealant, the second sealant sealing the plurality of second pillar electrodes,
wherein an end face of the first pillar electrode, an end face of the third pillar electrode and an end face of the first sealant are on a same plane, and
the connecting layer is formed on the same plane.