US 12,191,354 B2
Vertical transistors having at least 50% grain boundaries offset between top and bottom source/drain regions and the channel region that is vertically therebetween
Manuj Nahar, Boise, ID (US); Vassil N. Antonov, Boise, ID (US); Kamal M. Karda, Boise, ID (US); Michael Mutch, Meridian, ID (US); Hung-Wei Liu, Meridian, ID (US); and Jeffery B. Hull, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jul. 8, 2022, as Appl. No. 17/860,325.
Application 17/860,325 is a division of application No. 16/986,436, filed on Aug. 6, 2020, granted, now 11,417,730.
Claims priority of provisional application 62/884,781, filed on Aug. 9, 2019.
Prior Publication US 2022/0344468 A1, Oct. 27, 2022
Int. Cl. H01L 29/08 (2006.01); H01L 21/02 (2006.01); H01L 29/04 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/0847 (2013.01) [H01L 21/02595 (2013.01); H01L 21/02686 (2013.01); H01L 29/04 (2013.01); H01L 29/0684 (2013.01); H01L 29/66666 (2013.01); H01L 29/7827 (2013.01)] 7 Claims
OG exemplary drawing
 
1. A vertical transistor comprising:
a top source/drain region, a bottom source/drain region, a channel region vertically between the top and bottom source/drain regions, and a gate operatively laterally-adjacent the channel region;
the top and bottom source/drain regions having polycrystalline crystal grains and grain boundaries between immediately-adjacent of the polycrystalline crystal grains; the channel region having channel crystal grains having a first average crystal grain size and comprising grain boundaries between immediately-adjacent of the channel crystal grains, the top source/drain region having a second average crystal grain size, and the bottom source/drain region having a third average crystal grain size that differs from the second average crystal grain size;
the top source/drain region and the channel region having a top interface and the bottom source/drain region and the channel region having a bottom interface;
at least 50% of the grain boundaries in the top source/drain region at the top interface being laterally offset from the grain boundaries of the channel crystal grains in the channel region at the top interface; and
at least 50% of the grain boundaries in the bottom source/drain region at the bottom interface being laterally offset from the grain boundaries of the channel crystal grains in the channel region at the bottom interface.