US 12,191,353 B2
Transistors for radio-frequency circuits and devices
Yun Shi, San Diego, CA (US); and Tzung-Yin Lee, Costa Mesa, CA (US)
Assigned to Skyworks Solutions, Inc., Irvine, CA (US)
Filed by SKYWORKS SOLUTIONS, INC., Irvine, CA (US)
Filed on Jul. 17, 2023, as Appl. No. 18/353,478.
Application 18/353,478 is a continuation of application No. 16/872,575, filed on May 12, 2020, granted, now 11,705,487.
Claims priority of provisional application 62/846,684, filed on May 12, 2019.
Prior Publication US 2024/0021674 A1, Jan. 18, 2024
Int. Cl. H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/423 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/0696 (2013.01) [H01L 29/1095 (2013.01); H01L 29/4238 (2013.01); H01L 29/7841 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A transistor comprising:
a plurality of source regions and a plurality of drain regions arranged in an alternating manner, each of the plurality of source regions and the plurality of drain regions implemented as a first type active region;
a plurality of gate structures implemented relative to the plurality of source regions and the plurality of drain regions such that application of a voltage to each gate structure of the plurality of gate structures results in formation of a conductive channel between a respective pair of source and drain regions of the plurality of source regions and the plurality of drain regions;
a body region configured to provide a respective conductive channel upon the application of the voltage to a corresponding gate structure, the body region implemented as a second type active region; and
a recessed region defined by an end of each drain region of the plurality of drain regions and two neighboring body regions, such that the end of the drain region is recessed from corresponding ends of two neighboring gate structures of the plurality of gate structures.