US 12,191,255 B2
Interconnect substrate having groove around pad
Hikaru Tanaka, Nagano (JP); Takashi Kasuga, Nagano (JP); Tomoyuki Shimodaira, Nagano (JP); and Hitoshi Kondo, Nagano (JP)
Assigned to SHINKO ELECTRIC INDUSTRIES CO., LTD., Nagano (JP)
Filed by SHINKO ELECTRIC INDUSTRIES CO., LTD., Nagano (JP)
Filed on Oct. 14, 2022, as Appl. No. 18/046,557.
Claims priority of application No. 2021-171147 (JP), filed on Oct. 19, 2021.
Prior Publication US 2023/0120515 A1, Apr. 20, 2023
Int. Cl. H01L 23/532 (2006.01); H01L 23/482 (2006.01); H01L 23/522 (2006.01)
CPC H01L 23/5329 (2013.01) [H01L 23/4827 (2013.01); H01L 23/5226 (2013.01); H01L 23/53228 (2013.01); H01L 23/53242 (2013.01)] 9 Claims
OG exemplary drawing
 
1. An interconnect substrate, comprising:
a pad for external connection, the pad having an entirely planar shape; and
an insulating layer,
wherein a portion of a lower surface of the pad is in direct contact with the insulating layer,
wherein an upper surface of the pad is situated at a lower position than an upper surface of the insulating layer,
wherein a groove whose bottom surface is formed by the insulating layer completely surrounds the pad in a plan view, and has an opening on an upper surface side of the insulating layer,
wherein a bottom surface of the groove is at a lower position than the lower surface of the pad, and
wherein a surface of the insulating layer under the pad, which surface is in direct contact with the pad, is at a higher position than the bottom surface of the groove.