US 12,191,249 B2
Microelectronic devices including staircase structures, and related memory devices, electronic systems, and methods
David H. Wells, Boise, ID (US); Richard J. Hill, Boise, ID (US); Umberto M. Meotto, Rivoli (IT); and Matthew Thorum, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Sep. 3, 2021, as Appl. No. 17/446,868.
Prior Publication US 2023/0073372 A1, Mar. 9, 2023
Int. Cl. H10B 43/10 (2023.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01); H10B 41/10 (2023.01); H10B 41/27 (2023.01); H10B 41/35 (2023.01); H10B 41/40 (2023.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01); H10B 43/40 (2023.01); G11C 16/04 (2006.01)
CPC H01L 23/5226 (2013.01) [H01L 23/5283 (2013.01); H01L 23/53266 (2013.01); H01L 23/53271 (2013.01); H10B 41/10 (2023.02); H10B 41/27 (2023.02); H10B 41/35 (2023.02); H10B 41/40 (2023.02); H10B 43/10 (2023.02); H10B 43/27 (2023.02); H10B 43/35 (2023.02); H10B 43/40 (2023.02); G11C 16/0483 (2013.01)] 24 Claims
OG exemplary drawing
 
1. A microelectronic device, comprising:
a stack structure overlying a source tier, the stack structure comprising a vertically alternating sequence of conductive structures and insulative structures arranged in tiers;
a staircase structure within the stack structure and having steps comprising lateral edges of the tiers;
support structures vertically extending through the stack structure and within a horizontal area of the staircase structure;
conductive contacts vertically extending through the stack structure and horizontally neighboring the support structures within the horizontal area of the staircase structure, each of the conductive contacts having a horizontally projecting portion in contact with one of the conductive structures of the stack structure at one of the steps of the staircase structure; and
dielectric-filled trenches dividing the stack structure into multiple blocks individually including some of the conductive contacts and some of the support structures within horizontal boundaries of the blocks.