US 12,191,226 B2
Method of manufacturing heat dissipation substrate with high thermal conductivity for semiconductor device
Ming-Tzong Yang, Hsinchu (TW); Hsien-Hsin Lin, Hsinchu (TW); Wen-Kai Wan, Hsinchu (TW); Chia-Che Chung, Hsinchu (TW); and Chee-Wee Liu, Taipei (TW)
Assigned to MEDIATEK INC., Hsinchu (TW); and NATIONAL TAIWAN UNIVERSITY, Taipei (TW)
Filed by MEDIATEK INC., Hsinchu (TW); and Chee-Wee Liu, Taipei (TW)
Filed on Jan. 17, 2023, as Appl. No. 18/155,322.
Application 18/155,322 is a continuation of application No. 17/133,896, filed on Dec. 24, 2020, granted, now 11,587,846.
Claims priority of provisional application 63/067,901, filed on Aug. 20, 2020.
Prior Publication US 2023/0154824 A1, May 18, 2023
Int. Cl. H01L 23/373 (2006.01); H01L 21/768 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01)
CPC H01L 23/373 (2013.01) [H01L 21/768 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 2029/7858 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A semiconductor device mounted on a substrate through solder bumps, comprising:
a heat dissipation substrate, wherein a thermal conductivity of the heat dissipation substrate is between 200 Wm−1K−1 and 1200 Wm−1K−1; and
a device layer disposed on the heat dissipation substrate, wherein the device layer comprises a transistor, wherein the heat dissipation substrate is formed as a top layer of the semiconductor device and separated from the substrate by the device layer and the solder bumps, wherein the heat dissipation substrate has a bottommost surface located directly above all the solder bumps, and the bottommost surface of the heat dissipation substrate and a top surface of the device layer overlap each other completely.