CPC G11C 8/18 (2013.01) [G06F 21/44 (2013.01); G11C 7/1057 (2013.01); G11C 7/1084 (2013.01); G11C 8/20 (2013.01)] | 29 Claims |
1. A memory controller coupled between a memory module and a host controller to control access of the host controller to the memory module, wherein the memory controller comprises:
a central buffer coupled between the host controller and the memory module, wherein the central buffer is configured to receive a command/address signal from the host controller via a command/address channel, and selectively provide the command/address signal to the memory module, and the central buffer is further configured to receive an identity authentication message identifying a source of the command/address signal from the host controller, wherein the central buffer comprises a main signal path and a branch signal path, wherein the main signal path is between a receiving side and an output side of the command/address channel, and the branch signal path is coupled to the main signal path through an access control module, wherein the central buffer comprises:
a verification module, wherein the verification module is coupled in the branch signal path, and further coupled to the command/address channel to receive the command/address signal and the identity authentication message, and configured to determine whether the command/address signal conforms to an authority management rule based on the identity authentication message and generate a determination result; and
the access control module, wherein the access control module is coupled in the main signal path and further coupled to the command/address channel to receive the command/address signal, and coupled to the verification module to receive the determination result generated by the verification module, wherein the access control module is configured to process the command/address signal based on the determination result generated by the verification module to selectively provide the command/address signal to the memory module.
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