US 12,190,988 B2
Data coding device, memory controller, and storage device
Ie Ryung Park, Gyeonggi-do (KR); and Dong Sop Lee, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Jan. 9, 2023, as Appl. No. 18/094,398.
Claims priority of application No. 10-2022-0092853 (KR), filed on Jul. 27, 2022.
Prior Publication US 2024/0038317 A1, Feb. 1, 2024
Int. Cl. G11C 7/10 (2006.01); G11C 29/12 (2006.01)
CPC G11C 7/1006 (2013.01) [G11C 29/12005 (2013.01); G11C 29/1201 (2013.01); G11C 2029/1204 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A storage device comprising:
a memory device;
a pump voltage generator configured to externally supply a pump voltage to the memory device; and
a memory controller configured to provide conversion data obtained by converting data received from an external host to the memory device,
wherein the memory controller is configured to:
receive raw data having a total number of bits is 2N,
invert and output the raw data according to a comparison result with previous data output before the raw data when a number of reference data bits included in the raw data is N, and
output the conversion data by inverting the raw data according to the number of reference data bits included in the raw data when the number of reference data bits included in the raw data is not N, and
wherein the pump voltage generator receives a ready busy signal from the memory device.