transmitting a clock signal to a row driver circuit and to a delay circuit:

deactivating a word line based on the clock signal received by the row driver circuit, the word line operably connected to a memory cell;

transmitting a delayed clock signal output by the delay circuit to a control terminal of signal edge sharpener circuitry operably connected to a distal end of the word line;

based on the delayed clock signal, causing, by the signal edge sharpener circuitry, a rising edge of a word line signal on the word line to be pulled up at an increased rate; and

initiating a precharge operation on a bit line in response to the rising edge of the word line signal on the word line being pulled up to a predetermined level.