CPC G09G 3/2085 (2013.01) [G09G 3/32 (2013.01); G09G 2310/08 (2013.01); G09G 2320/064 (2013.01); G09G 2360/12 (2013.01)] | 16 Claims |
1. A display system comprising:
a display panel having a plurality of pixel arrangements, and;
a memory unit operably coupled to the plurality of pixel arrangements and disposed external to the display panel; and
wherein each pixel arrangement comprises:
at least one light emitting unit;
at least one driver circuit operably coupled to the light emitting unit; and
a digital counter circuit operably coupled to the at least one driver circuit; and
wherein the memory unit is configured to load a data value to the digital counter circuit of each pixel arrangement, wherein the data value corresponds to respective frame data per pixel of a frame to be displayed,
wherein the digital counter circuit of each pixel arrangement is configured to store the data value, to perform a counting down of the stored data value, and to toggle a state of the at least one driver circuit upon expiry of the digital counter circuit, thereby toggling a state of the light emitting unit to perform luminance control of the pixel arrangement, and
wherein the digital counter circuit of each pixel arrangement comprises a number of M digital counters, where M is an integer, and wherein when M>1 the M digital counters are symmetrically stacked.
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