US 12,190,177 B2
Processor restart using firmware boot from volatile memory
Karunakara Kotary, Vancouver, WA (US); Mallik Bulusu, Bellevue, WA (US); and Michael Alan Kubacki, Lakewood Ranch, FL (US)
Assigned to Microsoft Technology Licensing, LLC, Redmond, WA (US)
Filed by Microsoft Technology Licensing, LLC, Redmond, WA (US)
Filed on May 30, 2023, as Appl. No. 18/325,830.
Prior Publication US 2024/0403149 A1, Dec. 5, 2024
Int. Cl. G06F 9/54 (2006.01); G06F 9/44 (2018.01); G06F 9/4401 (2018.01)
CPC G06F 9/544 (2013.01) [G06F 9/4405 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
reserving a portion of a volatile memory on a system on chip (SOC) including one or more processors;
decompressing at least a portion of the firmware code from a non-volatile memory;
programming one or more volatile memory access control registers to remove write access to the reserved portion of the volatile memory;
programming a memory activation table (MAT), wherein the MAT includes a set of memory access controller register addresses and values of the memory access controller register addresses; and
communicating an address of the reserved portion of the volatile memory and the MAT to a trusted execution engine (TEE) on the SOC.