US 12,190,164 B2
Kickslot manager circuitry for graphics processors
Steven Fishwick, Kings Langley (GB); Fergus W. MacGarry, Cambridge (GB); Jonathan M. Redshaw, St Albans (GB); David A. Gotwalt, Winter Springs, FL (US); Ali Rabbani Rankouhi, Nottingham (GB); and Benjamin Bowman, London (GB)
Assigned to Apple Inc., Cupertino, CA (US)
Filed by Apple Inc., Cupertino, CA (US)
Filed on Aug. 11, 2021, as Appl. No. 17/399,808.
Prior Publication US 2023/0048951 A1, Feb. 16, 2023
Int. Cl. G06F 9/50 (2006.01); G06T 1/20 (2006.01); G06T 1/60 (2006.01)
CPC G06F 9/505 (2013.01) [G06F 9/5044 (2013.01); G06T 1/20 (2013.01); G06T 1/60 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
graphics processor circuitry;
tracking slot circuitry that implements entries for multiple tracking slots;
slot manager circuitry configured to:
receive and store, using an entry of the tracking slot circuitry, software-specified information for a set of graphics work, wherein the information includes: type of work, dependencies on other sets of graphics work, and location of data for the set of graphics work, wherein a given dependency indicates that the set of graphics work depends on results of another set of graphics work; and
prefetch, from the location and prior to allocation of shader core resources for the set of graphics work, configuration register data for the set of graphics work;
control circuitry configured to:
perform the allocation of shader core resources for the set of graphics work, wherein the shader core resources include configuration registers and wherein the slot manager circuitry is configured to perform the allocation only after any sets of graphics work on which the set of graphics work depends have completed;
program the allocated configuration registers for the set of graphics work, via a control register interface, using the prefetched configuration register data; and
initiate processing of the set of graphics work by the graphics processor circuitry.