US 12,190,117 B2
Suppressing allocation of registers for register renaming
Neil N. Marketkar, Boxborough, MA (US); and Arun A. Nair, Santa Clara, CA (US)
Assigned to Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed by Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed on Nov. 26, 2019, as Appl. No. 16/697,147.
Prior Publication US 2021/0157598 A1, May 27, 2021
Int. Cl. G06F 9/38 (2018.01); G06F 9/30 (2018.01)
CPC G06F 9/384 (2013.01) [G06F 9/30101 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A method for allocating registers for a processor, the method comprising:
in response to a first instruction from among an instruction dispatch set meeting all register allocation suppression criteria of a set of register allocation suppression criteria, wherein the set of register allocation suppression criteria includes a requirement that the first instruction writes flags that are to be overwritten by one or more younger instructions of the instruction dispatch set, suppressing allocation of a flags register for the first instruction;
executing the first instruction that meets the set of register allocation suppression criteria, resulting in data being generated and stored in a data register; and
in response to a second instruction from among the instruction dispatch set not meeting all of the register allocation suppression criteria, allocating a flags register for the second instruction.