US 12,190,116 B2
Microprocessor with time count based instruction execution and replay
Thang Minh Tran, Tustin, CA (US)
Assigned to Simplex Micro, Inc., Austin, TX (US)
Filed by Simplex Micro, Inc., San Jose, CA (US)
Filed on Apr. 5, 2022, as Appl. No. 17/713,569.
Prior Publication US 2023/0315474 A1, Oct. 5, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 9/38 (2018.01)
CPC G06F 9/3838 (2013.01) [G06F 9/3818 (2013.01); G06F 9/3824 (2013.01); G06F 9/3826 (2013.01); G06F 9/3836 (2013.01); G06F 9/3858 (2023.08)] 23 Claims
OG exemplary drawing
 
1. A processor implemented in an integrated circuit, the processor comprising:
a hardware time counter storing a time count representing a current time of the processor, wherein the time count is incremented with each clock cycle of a clock circuit;
an instruction issue unit that is coupled to the hardware time counter to receive the time count, the instruction issue unit receiving a first instruction, and issuing the first instruction with a preset first execution time based on the time count;
an execution queue that is coupled to the hardware time counter to receive the time count, and that is coupled to the instruction issue unit to receive the first instruction, the execution queue providing the first instruction to a functional unit when the preset first execution time corresponds to the time count; and
dispatch logic that responds to a determination that an operand stored in a source register of the first instruction is not valid by retaining the first instruction in the execution queue and replaying the first instruction.