CPC G06F 9/3455 (2013.01) [G06F 3/0647 (2013.01); G06F 3/0655 (2013.01); G06F 3/0679 (2013.01); G06F 9/30098 (2013.01); G06F 9/5016 (2013.01); G06F 9/544 (2013.01); G06N 3/063 (2013.01); G06N 3/02 (2013.01)] | 20 Claims |
1. A method for executing a strided data transfer operation from a source memory component to a destination memory component, the method comprising:
in response to a current source stride count in a source stride counter representing at least one remaining source data block in a first dimension of a source access pattern in the source memory component:
reading a current source address from a source address register;
reading a current destination address from a destination address register;
transferring a target source data block stored at the current source address to the current destination address; and
in response to completing transfer of the target source data block:
advancing the source address register based on the current source address and a source stride length in the first dimension;
advancing the destination address register; and
decrementing the current source stride count in the source stride counter.
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