US 12,190,079 B2
Semiconductor device comprising operation circuits and a switch circuit
Munehiro Kozuma, Atsugi (JP); Takeshi Aoki, Atsugi (JP); Seiichi Yoneda, Isehara (JP); and Yoshiyuki Kurokawa, Sagamihara (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed by Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed on Apr. 8, 2022, as Appl. No. 17/716,239.
Application 17/716,239 is a continuation of application No. 16/609,902, granted, now 11,314,484, previously published as PCT/IB2018/053139, filed on May 7, 2018.
Claims priority of application No. 2017-099514 (JP), filed on May 19, 2017; and application No. 2017-133264 (JP), filed on Jul. 7, 2017.
Prior Publication US 2022/0276838 A1, Sep. 1, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 7/544 (2006.01); G06N 3/063 (2023.01)
CPC G06F 7/5443 (2013.01) [G06N 3/063 (2013.01)] 6 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
operation circuits; and
a switch circuit,
wherein each of the operation circuits comprises:
a memory circuit configured to store a plurality of weight data; and
a multiplier circuit configured to perform an operation based on an input data and one of the plurality of weight data selected by a first context signal,
wherein the memory circuit is formed in a first layer,
wherein the multiplier circuit is formed in a second layer,
wherein the switch circuit is configured to switch an electrical connection state between the operation circuits in accordance with a second context signal, and
wherein a number of second contexts switched on the basis of the second context signal is smaller than a number of first contexts switched on the basis of the first context signal.