CPC G06F 3/0619 (2013.01) [G06F 3/0634 (2013.01); G06F 3/0656 (2013.01); G06F 3/0673 (2013.01)] | 19 Claims |
1. An apparatus, comprising:
a first memory device;
a second memory device; and
a controller, coupled to the first memory device and the second memory device, configured to:
buffer data in the second memory device;
write the buffered data from the second memory device to the first memory device;
send a first signal to the first memory device in response a determination that the second memory device is storing at least a threshold amount of data, wherein the first signal causes the first memory to enter an increased write performance mode; and
continue to write the buffered data from the second memory device to the first memory device in response to entering the increased write performance mode, wherein the increased write performance mode increases the rate at which the buffered data is written to the first memory device.
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