US 12,189,947 B2
Memory device and host device
Akihisa Fujimoto, Yamoto (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Dec. 28, 2022, as Appl. No. 18/147,306.
Application 15/955,867 is a division of application No. 14/700,625, filed on Apr. 30, 2015, granted, now 9,983,794, issued on May 29, 2018.
Application 18/147,306 is a continuation of application No. 17/196,390, filed on Mar. 9, 2021, granted, now 11,573,701.
Application 17/196,390 is a continuation of application No. 16/429,388, filed on Jun. 3, 2019, granted, now 10,976,930, issued on Apr. 13, 2021.
Application 16/429,388 is a continuation of application No. 15/955,867, filed on Apr. 18, 2018, granted, now 10,353,586, issued on Jul. 16, 2019.
Application 14/700,625 is a continuation of application No. PCT/JP2013/074959, filed on Sep. 10, 2013.
Claims priority of application No. 2012-238849 (JP), filed on Oct. 30, 2012; and application No. 2013-166804 (JP), filed on Aug. 9, 2013.
Prior Publication US 2023/0161475 A1, May 25, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 3/06 (2006.01); G06F 12/02 (2006.01); G06F 13/42 (2006.01)
CPC G06F 3/0608 (2013.01) [G06F 3/0658 (2013.01); G06F 3/0679 (2013.01); G06F 12/0246 (2013.01); G06F 13/4234 (2013.01); G06F 2212/1016 (2013.01); G06F 2212/1044 (2013.01); G06F 2212/177 (2013.01); G06F 2212/7202 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A memory device comprising:
a nonvolatile semiconductor memory having a plurality of physical storage areas that include an externally accessible user area, the user area being divided into a plurality of allocation units, the plurality of allocation units being divided into recording units; and
a control unit configured to control the nonvolatile semiconductor memory, wherein the control unit is configured to:
receive one or more control commands to designate a sequential write area for writing data;
assign, as the sequential write area, an allocation unit, of the plurality of allocation units, represented by an address of the one or more control commands;
receive one or more write commands, wherein:
the one or more write commands indicate access to an area, in the sequential write area, that has not been written;
a data length, indicated by the one or more write commands, is equivalent to one or more recording units; and
a data write location, indicated by the one or more write commands, is on a boundary of a recording unit; and
write data, associated with the one or more write commands, at an average speed that satisfies a write performance index.