	US 12,189,762 B2
	Secured speculative execution processor
Abraham Mendelson, Haifa (IL)
Assigned to Technion Research & Development Foundation Limited, Haifa (IL)
Appl. No. 17/619,321
Filed by Technion Research & Development Foundation Limited, Haifa (IL)
PCT Filed Jun. 19, 2020, PCT No. PCT/IL2020/050687 § 371(c)(1), (2) Date Dec. 15, 2021, PCT Pub. No. WO2020/255144, PCT Pub. Date Dec. 24, 2020.
Claims priority of provisional application 62/864,084, filed on Jun. 20, 2019.
Prior Publication US 2022/0300610 A1, Sep. 22, 2022
Int. Cl. G06F 21/55 (2013.01); G06F 12/0875 (2016.01)

CPC G06F 21/554 (2013.01) [G06F 12/0875 (2013.01); G06F 2212/452 (2013.01); G06F 2221/031 (2013.01)]

17 Claims

1. A system for protecting a speculative execution processor, from side channel attacks, comprising a processing circuitry, adapted to:

in a first time period, performing a plurality of executions of a same code segment in a plurality of time intervals and measure an execution time of the code segment in each of the plurality of time intervals;

updating a time register to include a highest execution time measured for the plurality of time intervals;

storing speculative instructions in an internal cache memory which is inaccessible to read actions of an external processing unit;

in a second time period, performing a delayed copy, wherein in said delayed copy, copying only a committed portion of the executed code segment into another memory component which is accessible to read actions of the external processing unit, wherein a delay time of said delayed copy is according to the highest execution time included in said time register;

wherein the first and second time periods are different and independent.