CPC G06F 16/2393 (2019.01) [G06F 11/3419 (2013.01)] | 30 Claims |
1. A system comprising:
at least one hardware processor; and
at least one memory storing instructions that cause the at least one hardware processor to perform operations comprising:
retrieving a plurality of materialized tables (MTs), each MT of the plurality of MTs including a lag duration and referring to a corresponding base table of a plurality of base tables, the lag duration indicating a maximum time period that a result of a prior refresh of a query on the corresponding base table can lag behind a current time instance;
determining a plurality of time instances for the MT based on the lag duration and a number of prior refreshes of the corresponding base table;
determining a plurality of aligned time instances for the plurality of MTs based on the plurality of time instances for each MT of the plurality of MTs and further based on a refresh instance value indicating a number of prior aligned time instances that have occurred up to a current time instance; and
scheduling refresh operations for the plurality of MTs at one or more of the plurality of aligned time instances that are within the maximum time period indicated by the lag duration associated with each of the plurality MTs.
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