US 12,189,562 B2
Memory system with selectively interfaceable memory subsystem
Qing Liang, Boise, ID (US); and Yang Lu, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jun. 22, 2022, as Appl. No. 17/846,988.
Application 17/846,988 is a continuation of application No. 16/893,205, filed on Jun. 4, 2020, granted, now 11,392,526.
Prior Publication US 2022/0318176 A1, Oct. 6, 2022
Int. Cl. G06F 13/40 (2006.01); G11C 11/00 (2006.01)
CPC G06F 13/4027 (2013.01) [G11C 11/005 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory system, comprising:
a first memory subsystem comprising first memory cells of a first type of memory, the first type of memory comprising non-volatile memory, and wherein the first memory subsystem is configured to communicate information with a host system via a first interface associated with the first type of memory;
a second memory subsystem comprising second memory cells of a second type of memory different than the first type of memory, the second type of memory comprising volatile memory, and wherein the second memory subsystem is configured to communicate information with the host system via a second interface associated with the second type of memory; and
a third memory subsystem comprising third memory cells of a third type memory that includes the first type of memory and the second type of memory, wherein the third memory cells comprise a first portion of third memory cells dynamically configured as the first type of memory and a second portion of third memory cells dynamically configured as the second type of memory, wherein the third memory subsystem is selectively configurable to communicate, with the host system, information from the first portion of third memory cells via the first interface and information from the second portion of third memory cells via the second interface.