US 12,189,560 B2
Apparatus and method for training device-to-device physical interface
Taekyung Yeo, Seoul (KR); Sangyun Hwang, Suwon-si (KR); Sujeong Kim, Hwaseong-si (KR); Jihun Oh, Hwaseong-si (KR); and Joohee Shin, Hwaseong-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Sep. 15, 2021, as Appl. No. 17/475,705.
Claims priority of application No. 10-2020-0135525 (KR), filed on Oct. 19, 2020.
Prior Publication US 2022/0121592 A1, Apr. 21, 2022
Int. Cl. G06F 13/40 (2006.01); G06F 13/42 (2006.01)
CPC G06F 13/4022 (2013.01) [G06F 13/4295 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A method of training a physical interface between a first device and a second device, the method comprising:
determining a timing of a signal transmission in a first candidate group, from a plurality of lanes between the first device and the second device, by performing a first training of the physical interface, the first training including temporarily setting the first candidate group and communicating a signal between the first device and the second device using the first candidate group of lanes from among the plurality of lanes;
determining a timing of a signal transmission in a second candidate group, from the plurality of lanes between the first device and the second device, by performing a second training of the physical interface, the second training including temporarily setting the second candidate group and communicating a signal between the first device and the second device using the second candidate group of lanes from among the plurality of lanes, the second candidate group being different from the first candidate group;
determining a lane group based on a comparison of the timings determined during the first training and the second training; and
setting the second device so that the determined lane group is used for the physical interface,
wherein the physical interface includes a high bandwidth memory (HBM) interface and the second device includes a plurality of memory dies that are stacked.