CPC G06F 13/4013 (2013.01) [G06V 10/82 (2022.01)] | 25 Claims |
1. An apparatus comprising:
memory;
instructions stored in the memory; and
one or more processor circuits coupled to the memory, the one or more processor circuits to utilize the instructions to:
reorder N-dimensional sparse data into a chunk of spatially collocated data, N being a positive integer, the reordering including:
identifying occupied data elements of the N-dimensional sparse data; and
identifying adjacent ones of the occupied data elements;
create a graphical representation of the occupied data elements where a node of the graphical representation represents an occupied data element and an edge that connects nodes of the graphical representation represents an adjacency between data elements represented by the nodes; and
forward the chunk for convolutional neural network processing.
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