US 12,189,553 B2
Transmit and receive circuits with multiple interfaces
Chunhua Hu, Plano, TX (US); and Sanand Prasad, Plano, TX (US)
Assigned to Texas Instruments Incorporated, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on Sep. 25, 2023, as Appl. No. 18/473,391.
Application 18/473,391 is a continuation of application No. 17/946,675, filed on Sep. 16, 2022, granted, now 11,768,784.
Application 17/946,675 is a continuation of application No. 17/139,441, filed on Dec. 31, 2020, granted, now 11,449,447, issued on Sep. 20, 2022.
Prior Publication US 2024/0012774 A1, Jan. 11, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 13/28 (2006.01); G06F 13/42 (2006.01)
CPC G06F 13/28 (2013.01) [G06F 13/4221 (2013.01); G06F 2213/0026 (2013.01); G06F 2213/28 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A circuit device comprising:
a transmit circuit that includes:
a first interface associated with a first set of virtual channels, wherein the first interface is configured to:
receive a first set of data for transmission; and
provide the first set of data for transmission via a virtual channel of the first set of virtual channels; and
a second interface associated with a second set of virtual channels that is different from the first set of virtual channels, wherein the second interface is configured to:
receive a second set of data for transmission; and
provide the second set of data for transmission via a virtual channel of the second set of virtual channels;
a first Direct Memory Access (DMA) circuit coupled to the first interface and associated with the first set of virtual channels; and
a second DMA circuit coupled to the second interface and associated with the second set of virtual channels.