US 12,189,550 B2
High performance interconnect
Robert J. Safranek, Portland, OR (US); Robert G. Blankenship, Tacoma, WA (US); Venkatraman Iyer, Austin, TX (US); Jeff Willey, Timnath, CO (US); Robert Beers, Hillsboro, OR (US); Darren S. Jue, Sunnyvale, CA (US); Arvind A. Kumar, Palo Alto, CA (US); Debendra Das Sharma, Saratoga, CA (US); Jeffrey C. Swanson, Sunnyvale, CA (US); Bahaa Fahim, Santa Clara, CA (US); Vedaraman Geetha, Fremont, CA (US); Aaron T. Spink, San Francisco, CA (US); Fulvio Spagna, San Jose, CA (US); Rahul R. Shah, Marlborough, MA (US); Sitaraman V. Iyer, San Jose, CA (US); William Harry Nale, Livermore, CA (US); Abhishek Das, Portland, OR (US); Simon P. Johnson, Beaverton, OR (US); Yuvraj S. Dhillon, Hillsboro, OR (US); Yen-Cheng Liu, Portland, OR (US); Raj K. Ramanujan, Federal Way, WA (US); Robert A. Maddox, Columbia, SC (US); Herbert H. Hum, Portland, OR (US); and Ashish Gupta, Chandler, AZ (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Jul. 5, 2023, as Appl. No. 18/347,236.
Application 18/347,236 is a continuation of application No. 17/556,853, filed on Dec. 20, 2021.
Application 17/556,853 is a continuation of application No. 17/134,242, filed on Dec. 25, 2020, granted, now 11,741,030, issued on Aug. 29, 2023.
Application 17/134,242 is a continuation of application No. 16/937,499, filed on Jul. 23, 2020, granted, now 11,269,793, issued on Mar. 8, 2022.
Application 16/937,499 is a continuation of application No. 16/285,035, filed on Feb. 25, 2019, abandoned.
Application 16/285,035 is a continuation of application No. 15/393,153, filed on Dec. 28, 2016, granted, now 10,248,591, issued on Apr. 2, 2019.
Application 15/393,153 is a continuation of application No. 14/060,191, filed on Oct. 22, 2013, granted, now 9,626,321, issued on Apr. 18, 2017.
Claims priority of provisional application 61/717,091, filed on Oct. 22, 2012.
Prior Publication US 2024/0012772 A1, Jan. 11, 2024
Int. Cl. G06F 13/22 (2006.01); G06F 1/3287 (2019.01); G06F 8/71 (2018.01); G06F 8/77 (2018.01); G06F 9/30 (2018.01); G06F 9/445 (2018.01); G06F 9/46 (2006.01); G06F 11/10 (2006.01); G06F 12/0806 (2016.01); G06F 12/0808 (2016.01); G06F 12/0813 (2016.01); G06F 12/0815 (2016.01); G06F 12/0831 (2016.01); G06F 13/40 (2006.01); G06F 13/42 (2006.01); H04L 9/06 (2006.01); H04L 49/15 (2022.01); G06F 8/73 (2018.01); H04L 12/46 (2006.01); H04L 45/74 (2022.01)
CPC G06F 13/22 (2013.01) [G06F 1/3287 (2013.01); G06F 8/71 (2013.01); G06F 8/77 (2013.01); G06F 9/30145 (2013.01); G06F 9/44505 (2013.01); G06F 9/466 (2013.01); G06F 11/1004 (2013.01); G06F 12/0806 (2013.01); G06F 12/0808 (2013.01); G06F 12/0813 (2013.01); G06F 12/0815 (2013.01); G06F 12/0831 (2013.01); G06F 12/0833 (2013.01); G06F 13/4022 (2013.01); G06F 13/4068 (2013.01); G06F 13/4221 (2013.01); G06F 13/4282 (2013.01); G06F 13/4286 (2013.01); G06F 13/4291 (2013.01); H04L 9/0662 (2013.01); H04L 49/15 (2013.01); G06F 8/73 (2013.01); G06F 13/4273 (2013.01); G06F 2212/1016 (2013.01); G06F 2212/2542 (2013.01); G06F 2212/622 (2013.01); H04L 12/4641 (2013.01); H04L 45/74 (2013.01); Y02D 10/00 (2018.01); Y02D 30/00 (2018.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a port to couple to another device over an interconnect, and the port comprises:
protocol circuitry to:
generate a flit based on a cache-coherent interconnect protocol, wherein the flit comprises a plurality of slots to carry a plurality of messages in the flit, and a slot in the plurality of slots is to carry at least a portion of a request message, the request message comprises: an opcode field, a source identifier field, and a destination identifier field; and
send the flit to the other device over the interconnect, wherein routing of the flit is based on at least one of the source identifier field or the destination identifier field.