US 12,189,536 B2
Memory controller with improved mapping information management, memory system including the same, and operating method of memory controller
Kyungbo Yang, Suwon-si (KR); Hyeonwu Kim, Suwon-si (KR); Dongik Jeon, Suwon-si (KR); and Soonsuk Hwang, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Apr. 18, 2023, as Appl. No. 18/135,894.
Claims priority of application No. 10-2022-0128086 (KR), filed on Oct. 6, 2022.
Prior Publication US 2024/0119009 A1, Apr. 11, 2024
Int. Cl. G06F 12/00 (2006.01); G06F 12/02 (2006.01); G06F 12/10 (2016.01)
CPC G06F 12/10 (2013.01) [G06F 12/0246 (2013.01); G06F 2212/7201 (2013.01); G06F 2212/7203 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of operating a memory controller for controlling a memory device, the method comprising:
receiving a write request and write data from a host;
storing first entry information in an entry buffer, wherein the first entry information comprises a write buffer pointer indicating a first location where the write data is temporarily stored in a write buffer and the first entry information comprises a first logical address corresponding to the write request;
storing an entry index in a first storage space corresponding to the first logical address in a logical-to-physical (L2P) mapping information storage circuit, wherein the entry index indicates a second location where the first entry information is stored in the entry buffer;
programming the write data into the memory device at a first physical address; and
updating the entry index stored in the first storage space to correspond to the first physical address, wherein the first physical address is mapped to the first logical address.