| CPC G06F 12/0802 (2013.01) [G06F 2212/60 (2013.01)] | 20 Claims |
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1. A system comprising:
a processor; and
a memory operating cooperatively with a cache controller, wherein the memory comprises a coherence directory stored within a cache created to track at least one cache line in the cache via the cache controller; and
the processor suppressing modification of a cache coherence tracking state of the at least one cache line when storing data in the at least one cache line by matching the data to the data to be evicted from the cache line.
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