US 12,189,478 B2
CRC RAID recovery from hard failure in memory systems
Marco Sforzin, Boise, ID (US); Paolo Amato, Boise, ID (US); and Daniele Balluchi, Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on May 31, 2022, as Appl. No. 17/828,475.
Claims priority of provisional application 63/303,911, filed on Jan. 27, 2022.
Prior Publication US 2023/0236930 A1, Jul. 27, 2023
Int. Cl. G06F 11/10 (2006.01)
CPC G06F 11/1084 (2013.01) 17 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
a redundant array of independent devices (RAID) memory controller comprising a plurality of memory channels; and
a plurality of memory arrays, wherein each memory array of the plurality of memory arrays (i) is coupled to a memory channel of the plurality of memory channels (ii) comprises a plurality of memory components, and (iii) is configured with a plurality of stripes;
wherein, when a particular stripe of the plurality of stripes comprises a failed memory component during a write operation of user data to a location within the particular stripe of the plurality of stripes, the RAID memory controller is configured to determine and compensate for the failed memory component, thereby allowing for a recovery of the user data in the failed memory component; and
wherein prior to initiating the write operation, an address of the write operation is compared to a recorded address of the failed memory component to determine a type of compensation to be used for recovery of the user data in the failed memory component.