US 12,189,476 B2
Soft error detection and correction for data storage devices
Ofir Kanter, Haifa (IL); Avi Steiner, Kiriat Motzkin (IL); and Yasuhiko Kurosawa, Fujisawa (JP)
Assigned to KIOXIA CORPORATION, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on May 30, 2023, as Appl. No. 18/325,370.
Application 18/325,370 is a division of application No. 17/154,661, filed on Jan. 21, 2021, granted, now 11,693,733.
Prior Publication US 2023/0305925 A1, Sep. 28, 2023
Int. Cl. G06F 11/10 (2006.01); H03M 13/29 (2006.01)
CPC G06F 11/1068 (2013.01) [G06F 11/1004 (2013.01); H03M 13/2906 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A non-transitory processor-readable media comprising processor-readable instructions, such that, when executed by at least one processor of a controller, causes the processor to:
generate a first signature using input data received from a host;
generate a codeword using at least the input data;
determine validity of the input data after processing the input data through a data path; and
in response to determining that the input data is valid, write the codeword to a non-volatile memory.