US 12,189,193 B2
Semiconductor package
Keisuke Shimizu, Ogaki (JP); and Tomoyuki Ikeda, Ogaki (JP)
Assigned to IBIDEN CO., LTD., Ogaki (JP)
Filed by IBIDEN CO., LTD., Gifu (JP)
Filed on Aug. 23, 2022, as Appl. No. 17/821,534.
Claims priority of application No. 2021-145088 (JP), filed on Sep. 7, 2021.
Prior Publication US 2023/0076560 A1, Mar. 9, 2023
Int. Cl. G02B 6/42 (2006.01); H01L 25/16 (2023.01)
CPC G02B 6/4214 (2013.01) [G02B 6/428 (2013.01); H01L 25/167 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package, comprising:
a printed wiring board;
a logic IC mounted on a first surface of the printed wiring board;
a connector mounted on a second surface of the printed wiring board on an opposite side of the printed wiring board with respect to the first surface;
an optical element configured to convert an optical signal and an electrical signal and positioned on the opposite side of the printed wiring board with respect to the first surface such that the optical element is at least partially embedded in the printed wiring board;
a path formed in the printed wiring board and configured to electrically connect the logic IC on the first surface of the printed wiring board and the optical element on the opposite side of the printed wiring board with respect to the first surface; and
an optical waveguide embedded on the opposite side of the printed wiring board with respect to the first surface and configured to optically connect the connector on the second surface of the printed wiring board and the optical element on the opposite side of the printed wiring board with respect to the first surface,
wherein the path is formed substantially straight and substantially perpendicular to the first surface of the printed wiring board, and the logic IC and the optical element are positioned such that the logic IC and the optical element at least partially overlap.