US 12,188,144 B2
Wafer immersion in semiconductor processing chambers
John L. Klocke, Kalispell, MT (US); and John Igo, Kalispell, MT (US)
Assigned to Applied Materials, Inc., Santa Clara, CA (US)
Filed by Applied Materials, Inc., Santa Clara, CA (US)
Filed on Jan. 31, 2022, as Appl. No. 17/589,051.
Prior Publication US 2023/0243059 A1, Aug. 3, 2023
Int. Cl. C25D 7/12 (2006.01); C25D 17/00 (2006.01); C25D 21/12 (2006.01); G05B 13/02 (2006.01)
CPC C25D 7/12 (2013.01) [C25D 17/001 (2013.01); C25D 21/12 (2013.01); G05B 13/027 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A semiconductor processing system comprising:
a semiconductor processing chamber configured to execute a process on a semiconductor wafer that is at least partially submerged in a liquid within the semiconductor processing chamber;
a camera that is positioned to capture images of the liquid; and
a controller configured to:
provide the images of the liquid to a neural network trained to identify defects in a surface of the liquid;
determine when the liquid is ready to receive the semiconductor wafer and the surface of the liquid has less than a threshold level of defects based on an output of the neural network, wherein the defects comprise ripples or contaminants visible in the liquid; and
in response to determining that the liquid is ready to receive the semiconductor wafer and the surface of the liquid has less than a threshold level of defects, cause the semiconductor wafer to be at least partially submerged in the liquid.