US 12,187,606 B2
MEMS cavity with non-contaminating seal
Michael Julian Daneman, Campbell, CA (US); Charles I. Grosjean, Los Gatos, CA (US); and Paul M. Hagelin, Saratoga, CA (US)
Assigned to SiTime Corporation, Sunnyvale, CA (US)
Filed by SiTime Corporation, Santa Clara, CA (US)
Filed on Mar. 3, 2023, as Appl. No. 18/117,230.
Application 17/543,041 is a division of application No. 16/880,209, filed on May 21, 2020, granted, now 11,220,425, issued on Jan. 11, 2022.
Application 16/880,209 is a division of application No. 15/897,135, filed on Feb. 14, 2018, granted, now 10,696,547, issued on Jun. 30, 2020.
Application 18/117,230 is a continuation of application No. 17/543,041, filed on Dec. 6, 2021, granted, now 11,618,675.
Claims priority of provisional application 62/459,017, filed on Feb. 14, 2017.
Prior Publication US 2023/0286798 A1, Sep. 14, 2023
Int. Cl. B81C 1/00 (2006.01); B81B 7/00 (2006.01)
CPC B81C 1/00293 (2013.01) [B81B 7/0041 (2013.01); B81B 2201/0271 (2013.01); B81B 2201/032 (2013.01); B81C 2203/0145 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit comprising:
a layer stack, including a first silicon layer, a second silicon layer, and an oxide layer between the first silicon layer and the second silicon layer;
a chamber within the layer stack, between the first silicon layer and the second silicon layer;
a microelectromechanical systems (MEMS) component within the layer stack, the MEMS component having a piezoelectric layer;
an electrode within the layer stack, and a conductive path that connects the electrode with an electrical contact on an exterior surface of the integrated circuit, the conductive path being configured so as to provide an output signal, from the electrode, representing sensed motion of the MEMS component;
a passageway extending through the one of the first silicon layer and the second silicon layer, the passageway having at least one bend so as to prevent line-of-sight view through the one of the first silicon layer and the second silicon layer;
the chamber being formed at least in part by removal of oxide from the oxide layer, via the passageway, such that the MEMS component is free to deflect or move within the chamber; and
at least one material deposited so as to block the passageway, following the removal of the oxide, in a region in between the at least one bend and an exterior surface of the integrated circuit, wherein the at least one bend is configured so as to inhibit deposition ingress of the at least one material into the chamber.