US 11,856,771 B2
Method of forming silicon-oxide-nitride-oxide-silicon (SONOS) memory cell for FinFET
Liang Yi, Singapore (SG); Zhiguo Li, Singapore (SG); and Chi Ren, Singapore (SG)
Assigned to UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed by UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed on Jul. 14, 2022, as Appl. No. 17/864,435.
Application 17/864,435 is a division of application No. 17/224,100, filed on Apr. 6, 2021.
Claims priority of application No. 202110266360.6 (CN), filed on Mar. 11, 2021.
Prior Publication US 2022/0352195 A1, Nov. 3, 2022
Int. Cl. H10B 43/20 (2023.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H10B 41/20 (2023.01)
CPC H10B 43/20 (2023.02) [H01L 29/66795 (2013.01); H01L 29/7851 (2013.01); H10B 41/20 (2023.02)] 12 Claims
OG exemplary drawing
 
1. A method of forming a silicon-oxide-nitride-oxide-silicon (SONOS) memory cell for FinFET, comprising:
forming a fin on a top surface of a substrate, wherein the fin comprises a memory region and a logic region;
sequentially depositing a charge trapping material and a control gate material covering the fin and the substrate blanketly;
patterning the control gate material and the charge trapping material to form a charge trapping layer and a control electrode over the fin of the memory region;
sequentially depositing a dielectric layer and a gate electrode layer covering the fin and the substrate blanketly;
patterning the gate electrode layer and the dielectric layer to form a gate in the logic region and a selective gate in the memory region adjacent to the control gate; and
replacing the selective gate and the gate by a selective metal gate and a metal gate respectively.