CPC H10B 41/27 (2023.02) [H01L 21/76802 (2013.01); H01L 21/76889 (2013.01); H10B 43/27 (2023.02)] | 21 Claims |
1. A method used in forming a memory array comprising strings of memory cells, comprising:
forming a conductor tier comprising conductor material on a substrate;
forming laterally-spaced memory-block regions individually comprising a vertical stack comprising alternating first tiers and second tiers directly above the conductor tier, channel-material strings of memory cells extending through the first tiers and the second tiers;
forming horizontally-elongated lines in the conductor tier between the laterally-spaced memory-block regions, the horizontally-elongated lines being of different composition from an upper portion of the conductor material and comprising metal material; and
after forming the horizontally-elongated lines, forming conductive material in a lower of the first tiers and that directly electrically couples together the channel material of individual of the channel-material strings and the conductor material of the conductor tier.
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