US 11,855,148 B2
Vertical field effect transistor with dual threshold voltage
Takashi Ando, Eastchester, NY (US); Ruilong Xie, Niskayuna, NY (US); Pouya Hashemi, Purchase, NY (US); and Alexander Reznicek, Troy, NY (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by International Business Machines Corporation, Armonk, NY (US)
Filed on Oct. 26, 2021, as Appl. No. 17/452,341.
Prior Publication US 2023/0128314 A1, Apr. 27, 2023
Int. Cl. H01L 29/10 (2006.01); H01L 29/06 (2006.01); H01L 29/78 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01)
CPC H01L 29/1033 (2013.01) [H01L 29/0607 (2013.01); H01L 29/42372 (2013.01); H01L 29/66666 (2013.01); H01L 29/7827 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A vertical field effect transistor (VFET) comprising:
a drain;
a source;
a channel extending, in a direction perpendicular to a substrate of the VFET, between the drain and source; and
a gate comprising a first work function metal (WFM) and a second WFM disposed between the first WFM and the source,
wherein the first WFM is disposed closer to the drain than is the second WFM,
wherein the first WFM comprises a first plurality of layers and the second WFM comprises a second plurality of layers,
wherein a first layer of the first plurality of layers, disposed closest to a side of the channel, is thinner than a first layer of the second plurality of layers, disposed closest to the side of the channel, and
wherein the first layer of the first plurality of layers and the first layer of the second plurality of layers are formed of a same material.