US 11,854,660 B2
Slew signal shaper circuit using two signal paths
Lalit Gupta, Fremont, CA (US); Andreas Jon Gotterba, Santa Clara, CA (US); and Jesse Wang, Santa Clara, CA (US)
Assigned to NVIDIA CORP., Santa Clara, CA (US)
Filed by NVIDIA Corp., Santa Clara, CA (US)
Filed on Dec. 20, 2021, as Appl. No. 17/556,046.
Prior Publication US 2023/0197127 A1, Jun. 22, 2023
Int. Cl. G11C 7/12 (2006.01); G11C 5/06 (2006.01); G11C 7/22 (2006.01)
CPC G11C 7/12 (2013.01) [G11C 5/063 (2013.01); G11C 7/22 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A circuit comprising:
a signal driver to generate a signal at a first end of a signal path;
the signal path splitting into a first route and a second route, wherein the first route is loaded to an extent that, in the absence of the second route, degrades a slew rate of the signal at a second end of the signal path;
the second route being lightly loaded or unloaded relative to the first route;
a transistor configured to pull down the signal on the first route;
a pulse shaping circuit coupling the first route to the second route at the second end of the signal path; and
wherein the pulse shaping circuit comprising a NAND combination of the second route and a timing control signal coupled to a gate of the transistor.