US 10,512,181 B2
Power semiconductor device and power conversion device
Tokihito Suwa, Hitachinaka (JP); Yujiro Kaneko, Hitachinaka (JP); Yusuke Takagi, Hitachinaka (JP); Shinichi Fujino, Mito (JP); and Takahiro Shimura, Mito (JP)
Assigned to Hitachi Automotive Systems, Ltd., Hitachinaka-shi (JP)
Filed by Hitachi Automotive Systems, Ltd., Hitachinaka-shi (JP)
Filed on Jun. 25, 2018, as Appl. No. 16/17,827.
Application 16/017,827 is a continuation of application No. 14/856,819, filed on Sep. 17, 2015, granted, now 10,034,401.
Application 14/856,819 is a continuation of application No. 13/163,950, filed on Jun. 20, 2011, granted, now 9,179,581, issued on Nov. 3, 2015.
Claims priority of application No. 2010-140723 (JP), filed on Jun. 21, 2010.
Prior Publication US 2018/0303001 A1, Oct. 18, 2018
This patent is subject to a terminal disclaimer.
Int. Cl. H05K 5/02 (2006.01); H05K 7/20 (2006.01); H01L 23/473 (2006.01); H01L 23/495 (2006.01); H01L 23/00 (2006.01); H02M 7/537 (2006.01); H05K 7/14 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01)
CPC H05K 5/0247 (2013.01) [H01L 23/473 (2013.01); H01L 23/49562 (2013.01); H01L 23/49575 (2013.01); H01L 24/34 (2013.01); H01L 24/36 (2013.01); H01L 24/40 (2013.01); H01L 24/73 (2013.01); H02M 7/537 (2013.01); H05K 7/1432 (2013.01); H05K 7/2089 (2013.01); H05K 7/20845 (2013.01); H05K 7/20927 (2013.01); H01L 21/565 (2013.01); H01L 23/3107 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/33 (2013.01); H01L 24/48 (2013.01); H01L 2224/291 (2013.01); H01L 2224/29139 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/33181 (2013.01); H01L 2224/40137 (2013.01); H01L 2224/45015 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/73215 (2013.01); H01L 2224/73221 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/8384 (2013.01); H01L 2224/83801 (2013.01); H01L 2224/84 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/1203 (2013.01); H01L 2924/1305 (2013.01); H01L 2924/1306 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/181 (2013.01); H01L 2924/207 (2013.01); H01L 2924/3025 (2013.01); H01L 2924/30107 (2013.01); H01L 2924/351 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A power semiconductor device, comprising:
a first power semiconductor element constituting an upper arm of an inverter circuit;
a second power semiconductor element constituting a lower arm of the inverter circuit;
a first conductor plate on which the first power semiconductor element is connected through a first metal bonding material;
a second conductor plate that faces the first conductor plate with the first power semiconductor element sandwiched therebetween;
a third conductor plate on which the second power semiconductor element is connected through a second metal bonding material;
a fourth conductor plate that faces the second conductor plate with the second power semiconductor element sandwiched therebetween;
a DC positive terminal formed integrally with the first conductor plate;
a DC negative terminal formed separately with the fourth conductor plate and connected with the fourth conductor plate through a third metal bonding material;
an AC terminal formed integrally with the third conductor plate, and
a sealing member that integrally seals the first conductor plate, the second conductor plate, the third conductor plate, and the fourth conductor plate, wherein
each of the DC positive terminal, the DC negative terminal, and the AC terminal has a cut section formed by cutting a tie bar that integrally couples the DC positive terminal, the DC negative terminal, and the AC terminal.