CPC H10N 50/80 (2023.02) [G11C 11/161 (2013.01); H01F 10/329 (2013.01); H01F 10/3254 (2013.01); H01F 10/3286 (2013.01); H10B 61/00 (2023.02); G11C 11/165 (2013.01)] | 9 Claims |
1. A memory device, comprising:
a first electrode;
a second electrode;
a magnetic tunnel junction located between the first electrode and the second electrode and comprising:
a plurality of reference layers spaced apart from each other;
at least one free layer; and
a first nonmagnetic tunnel barrier layer interposed between a most proximal one of the plurality of reference layers and the at least one free layer; and
a composite synthetic antiferromagnet (SAF) structure located between the first electrode and the magnetic tunnel junction, wherein the SAF structure comprises a first superlattice, a second superlattice, and an antiferromagnetic coupling layer located between the first superlattice and the second superlattice;
wherein:
the antiferromagnetic coupling layer comprises an iridium layer;
the first superlattice comprises the first superlattice of first cobalt layers and first platinum layers; and
the second superlattice comprises the second superlattice of second cobalt layers and second platinum layers.
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