	US 11,837,315 B2
	Transferring data between DRAM and SRAM
Timothy P. Finkbeiner, Boise, ID (US); Troy A. Manning, Meridian, ID (US); Troy D. Larsen, Meridian, ID (US); and Glen E. Hush, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jun. 30, 2022, as Appl. No. 17/855,212.
Application 17/855,212 is a continuation of application No. 17/124,697, filed on Dec. 17, 2020, granted, now 11,380,372.
Prior Publication US 2022/0335987 A1, Oct. 20, 2022
Int. Cl. G11C 7/06 (2006.01); G11C 7/10 (2006.01)

CPC G11C 7/065 (2013.01) [G11C 7/1039 (2013.01); G11C 7/1075 (2013.01); G11C 7/1096 (2013.01)]

13 Claims

1. A method for performing a data transfer operation, comprising:

receiving a command from a controller at a dynamic random access memory (DRAM) via a data bus, wherein the controller and DRAM are coupled together via the data bus;

activating a first portion of the DRAM in response to the DRAM receiving the command from the controller;

reading data from the first portion of the DRAM;

receiving a DRAM command from the DRAM at a static random access memory (SRAM);

converting the DRAM command to an SRAM command; and

writing the data from the first portion of the DRAM to a first portion of the SRAM in response to the SRAM receiving the DRAM command from the DRAM.