CPC G11C 11/4091 (2013.01) [G11C 11/406 (2013.01)] | 18 Claims |
1. An apparatus comprising:
a word line coupled to a first memory cell, a second memory cell, and a third memory cell;
a first sense amplifier coupled to the first memory cell;
a second sense amplifier coupled to the second memory cell and the third memory cell; and
a counter circuit coupled to the second sense amplifier, wherein the counter circuit is configured to adjust a count value stored, in part, in the second and the third memory cell based on accesses to the word line.
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