	US 11,836,641 B2
	Machine learning-based prediction of metrics at early-stage circuit design
Ravi Mamidi, Milpitas, CA (US); Siddhartha Nath, San Jose, CA (US); Wei-Ting Chan, Portland, OR (US); and Vishal Khandelwal, Portland, OR (US)
Assigned to SYNOPSYS, INC., Sunnyvale, CA (US)
Filed by Synopsys, Inc., Sunnyvale, CA (US)
Filed on Mar. 15, 2021, as Appl. No. 17/201,560.
Claims priority of provisional application 62/989,687, filed on Mar. 14, 2020.
Prior Publication US 2021/0287120 A1, Sep. 16, 2021
Int. Cl. G06N 5/04 (2023.01); G06N 20/00 (2019.01); G06F 30/398 (2020.01); G06F 111/04 (2020.01); G06F 119/06 (2020.01)

CPC G06N 5/04 (2013.01) [G06F 30/398 (2020.01); G06N 20/00 (2019.01); G06F 2111/04 (2020.01); G06F 2119/06 (2020.01)]

19 Claims

1. A method, comprising:

generating, by one or more processors, a pre-route partial circuit design run for a circuit;

producing, by the one or more processors, a predicted post-route quality-of-result (QoR) metric for the pre-route partial circuit design run by executing a machine learning (ML) model on a plurality of pre-route features of the pre-route partial circuit design run, wherein the ML model is trained using pre-route features extracted from a training circuit at a development phase and actual post-route QoR metrics from a completed design run of the training circuit, wherein the completed design run of the training circuit comprises routes corresponding to connectors connecting circuit components of the circuit and wherein the actual post-route QoR metrics are computed based on the routes of the completed design run;

determining, by the one or more processors and based on the predicted post-route QoR metric, that the pre-route partial circuit design run satisfies a constraint on the predicted post-route QoR metric; and

executing, by the one or more processors, a complete circuit design run for the circuit from the pre-route partial circuit design run based on the determination that the pre-route partial circuit design run satisfies the constraint.